NDLI: On Extended Graph-Based Rewiring Technique

Content Provider	IEEE Xplore Digital Library
Author	Chim, F.S. Wu, Y.L.
Copyright Year	2007
Description	Author affiliation: Chinese Univ. of Hong Kong, Hong Kong (Chim, F.S.; Wu, Y.L.)
Abstract	The digital logic rewiring technique has been shown to be one of the most powerful logic transformation methods being able to further improve some already excellent results on many EDA problems, starting from logic minimization, partitioning, FPGA technology mappings and final routings. Previous studies show that GBAW, a graph-based rewiring engine, is able to outperform ATPG-based rewiring tools with 50-time faster runtime while being able to cover nearly half target wires in the circuit. This paper presents several new improving extensions on GBAW, including coverage of arbitrary gate sizes, to improve its rewiring power. Experimental results based on MCNC benchmark circuits show that, compared to previous GBAW, this new version is able to cover 12% more target wires and provide 1.5 times more alternative wires while runs over 100 times faster than its ATPG-based counterpart. For some problems only requiring a good-enough and very quick solution, this new rewiring technique may serve as a useful alternative.
Starting Page	114
Ending Page	117
File Size	120554
Page Count	4
File Format	PDF
ISBN	9781424411313
DOI	10.1109/ICASIC.2007.4415580
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-10-22
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Wires Electronic design automation and methodology Engines Field programmable gate arrays Humans Transistors Logic circuits Circuit faults Automatic test pattern generation Circuit testing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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