NDLI: New observation and the modeling of gate and drain currents in off-state P-MOSFET's

Content Provider	IEEE Xplore Digital Library
Author	Ming-Jer Chen Jum-Chang Chao Chia-Hsiang Chen
Copyright Year	1963
Abstract	The work reports new observations concerning the gate and drain currents measured at off-state conditions in buried-type p-channel LDD MOSFET devices. Detailed investigation of the observed phenomena reveals that 1) the drain current can be separated into two distinct components: band-to-band tunneling in the gate-to-drain overlap region and collection of holes generated via impact ionization by electrons inside the oxide; and 2) the gate current can be separated into two distinct components: the hot electron injection into the oxide and the Fowler-Nordheim electron tunneling through the oxide, At low negative drain voltage, the dominant component of the drain current is the hole generation inside the oxide. At high negative drain voltage, the drain current is essentially due to band-to-band tunneling, and it is correlated with the hot-electron injection-induced gate current.<>
Sponsorship	IEEE Electron Devices Society
Starting Page	734
Ending Page	739
Page Count	6
File Size	566187
File Format	PDF
ISSN	00189383
Volume Number	41
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-05-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFET circuits Tunneling Charge carrier processes Current measurement Leakage current Chaos Impact ionization Secondary generated hot electron injection Low voltage
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Analysis of gate oxide thickness hot carrier effects in surface channel P-MOSFET's

Mechanisms of interface trap-induced drain leakage current in off-state n-MOSFET's

Interface trap effect on gate induced drain leakage current in submicron N-MOSFET's

Numerical simulation of avalanche hot-carrier injection in short-channel MOSFET's

Application of the floating-gate technique to the study of the n-MOSFET gate current evolution due to hot-carrier aging

Polarity dependent gate tunneling currents in dual-gate CMOSFETs

Structural effect on band-trap-band tunneling induced drain leakage in n-MOSFET's

A coupled study by floating-gate and charge-pumping techniques of hot carrier-induced defects in submicrometer LDD n-MOSFET's

Direct lateral profiling of hot-carrier-induced oxide charge and interface traps in thin gate MOSFET's

New observation and the modeling of gate and drain currents in off-state P-MOSFET's

Similar Documents

Analysis of gate oxide thickness hot carrier effects in surface channel P-MOSFET's

Mechanisms of interface trap-induced drain leakage current in off-state n-MOSFET's

Interface trap effect on gate induced drain leakage current in submicron N-MOSFET's

Numerical simulation of avalanche hot-carrier injection in short-channel MOSFET's

Application of the floating-gate technique to the study of the n-MOSFET gate current evolution due to hot-carrier aging

Polarity dependent gate tunneling currents in dual-gate CMOSFETs

Structural effect on band-trap-band tunneling induced drain leakage in n-MOSFET's

A coupled study by floating-gate and charge-pumping techniques of hot carrier-induced defects in submicrometer LDD n-MOSFET's

Direct lateral profiling of hot-carrier-induced oxide charge and interface traps in thin gate MOSFET's

New observation and the modeling of gate and drain currents in off-state P-MOSFET's