NDLI: Hot-carrier-reliability design rules for translating device degradation to CMOS digital circuit degradation

Content Provider	IEEE Xplore Digital Library
Author	Quader, K.N. Peng Fang Yue, J.T. Ko, P.K. Chenming Hu
Copyright Year	1963
Abstract	Long term ring-oscillator hot-carrier degradation data and simulation results are compared to demonstrate that a circuit reliability simulator BERT can predict CMOS digital circuit speed degradation from transistor DC stress data. Initial fast degradation is noted and attributed to the "zero crossing" effect caused by PMOSFET current enhancement. Saturation drain current, measured at V/sub gs/=V/sub ds/=Vdd/2, is a better monitor for CMOS circuit hot-carrier reliability. We present generalized hot-carrier-reliability design rules, lifetime and speed factors, that translate DC device lifetime to CMOS digital circuit lifetime. The design rules can roughly predict CMOS circuit degradation during the initial design and can aid reliability engineers to quickly estimate the overall product hot-carrier reliability. The NMOSFET and PMOSFET lifetime factors are found to obey 4/ft/sub rise/ and 10/ft/sub fall/, respectively. Typically, the NMOSFET and PMOSFET speed degradation factors are 1/4 and 1/2, respectively, with saturation region drain current as the monitor while, for a 100 MHz operating frequency and for an input rise time of 0.35 ns, the NMOSFET and PMOSFET lifetime factors are 120 and 300, respectively.<>
Sponsorship	IEEE Electron Devices Society
Starting Page	681
Ending Page	691
Page Count	11
File Size	1070462
File Format	PDF
ISSN	00189383
Volume Number	41
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-05-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hot carriers MOSFET circuits Degradation Predictive models Circuit simulation CMOS digital integrated circuits Digital circuits Monitoring Bit error rate Stress
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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