NDLI: An Integrated Modular and Standard Cell VLSI Design Approach

Content Provider	IEEE Xplore Digital Library
Author	Kasai, R. Fukami, K. Tansho, K. Kitazawa, H. Horiguchi, S.
Copyright Year	1966
Description	An advanced design method integrating different design approaches is proposed which can attain an optimized chip design within an acceptable turnaround time (TAT). Logic VLSI networks can be generally partitioned into data path logic, control logic, and on-chip memories. The data path logic is primarily realized by using repeatable structured general purpose function blocks, while the control logic is designed using standard cells or programmable logic arrays (PLA's). A cell library and powerful CAD programs are utilized to shorten the TAT. A CMOS 16-bit micro-computer is designed with this approach and compared with a fully automated standard cell chip. A gate density improvement of 30 percent is observed. A design effort of only 20 man-months is achieved.
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	407
Ending Page	412
Page Count	6
File Size	1023468
File Format	PDF
ISSN	00189200
Volume Number	20
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1985-02-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Very large scale integration Programmable logic arrays CMOS logic circuits Logic design Programmable control Design methodology Design optimization Chip scale packaging Network-on-a-chip Automatic control
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
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8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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