NDLI: Self-Aligned Transistors with Polysilicon Emitters for Bipolar VLSI

Content Provider	IEEE Xplore Digital Library
Author	Cuthbertson, A. Ashburn, P.
Copyright Year	1966
Description	A new bipolar process technology for fabricating self-aligned transistors with polysilicon contacted emitters is described. The extrinsic base regions of the transistor are self-aligned to the emitter contact by exploiting the effects of concentration-dependent oxidation to selectively oxidize the polysilicon. The shallow emitter is fabricated with a thin oxide layer at the polysilicon-silicon interface, thereby enhancing the emitter efficiency and thus the current gain of the device. It is demonstrated that this gain enhancement can be traded for a considerable increase in active base doping, with a resulting decrease in base resistance and potential improvement in switching performance. Under certain circumstances, non-ideal electrical characteristics can be obtained from the self-aligned transistor which are caused by lateral spread of the extrinsic base region beneath the sidewall oxide of the polysilicon emitter contact. Tlris leads to the formation of p/sup +/ -n/sup +/ junction at the periphery of the emitter and hence to tunneling of carriers across this region. It is shown that the same tunneling mechanism also limits the extent to which the active base doping can be increased. In order to avoid the formation of the peripheral p/sup +/-n/sup +/ junction, a polysilicon base contact is employed which allows a self-aligned extrinsic base region to be fabricated with negligible lateral movement.
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	162
Ending Page	167
Page Count	6
File Size	1092537
File Format	PDF
ISSN	00189200
Volume Number	20
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1985-02-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Very large scale integration Circuits Oxidation Doping Etching Silicon Performance gain Delay Bipolar transistors Electric resistance
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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