NDLI: Synthesis of heterogeneous pipelined multiprocessor systems using ILP: jpeg case study

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Synthesis of heterogeneous pipelined multiprocessor systems using ILP: jpeg case study

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Synthesis of heterogeneous pipelined multiprocessor systems using ILP: jpeg case study

Content Provider	ACM Digital Library
Author	Javaid, Haris Parameswaran, Sri
Abstract	Streaming applications can be implemented with a pipeline of processors. Each processor in the pipeline can be an application Specific Instruction Set Processor (ASIP) with the result being a heterogeneous pipelined MPSoC system. Since ASIPs can be of differing configurations, finding the optimal set of configurations for a multiprocessor architecture is a difficult problem. In this paper, we obtain an optimal system design for a set of processors which execute a multimedia application. The variables in the system are the presence or absence of different additional instructions and differing cache configurations for each of the processors. The problem is formulated as a 0-1 Integer Linear Programming (ILP) problem. To reduce the complexity of the ILP formulation, inferior ASIP configurations are efficiently pruned so that the solution could be reached quickly. Given a system runtime constraint, the proposed methodology finds a design with minimal area. We integrated this design methodology into a commercial design flow, and performed a case study upon the JPEG encoding application. We obtained 15 optimal designs subject to 15 different runtime constraints, each in less than 100 seconds from more than 4.2 x $10^{13}$ design points.
Starting Page	1
Ending Page	6
Page Count	6
File Format	PDF
ISBN	9781605584706
DOI	10.1145/1450135.1450137
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2008-10-19
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Integer linear programming Mpsocs Design space exploration
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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