NDLI: BSArc: blacksmith streaming architecture for HPC accelerators

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BSArc: blacksmith streaming architecture for HPC accelerators

Content Provider	ACM Digital Library
Author	Pericas, Miquel Ayguade, Eduard Navarro, Nacho Shafiq, Muhammad
Abstract	The current trend in high performance computing (HPC) systems is to deploy parallel computers equipped with general purpose multi-core processors and possibly multi-core streaming accelerators. However, the performance of these multi-cores is often constrained by the limited external bandwidth or by badly matching data access patterns. The latter reduces the size of useful data during memory transactions. A change in the application algorithm can improve the memory accesses but a hardware support mechanism for an application specific data arrangement in the memory hierarchy can significantly boost the performance for many application domains. In this work, we present a conceptual computing architecture named BSArc (Blacksmith Streaming Architecture). BSArc introduces a forging front-end to efficiently distribute data to a large set of simple streaming processors in the back-end. We apply this concept to a SIMT execution model and present a design space exploration in the context of a GPU-like streaming architecture with a reconfigurable application specific front-end. These design space explorations are carried out on a streaming architectural simulator that models BSArc. We evaluate the performance advantages for the BSArc design against a standard L2 cache in a GPU-like device. In our evaluations we use three application kernels: 2D-FFT, Matrix-Matrix Multiplication and 3D-Stencil. The results show that employing an application specific arrangement of data on these kernels achieves an average speedup of 2.3× compared to a standard cache for a GPU-like streaming device.
Starting Page	23
Ending Page	32
Page Count	10
File Format	PDF
ISBN	9781450312158
DOI	10.1145/2212908.2212914
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2012-05-15
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Design space Hybrid gpu-fpga Bsarc Reconfigurable logic Gpu simulator Sarcs Gpu Customized memory
Content Type	Text
Resource Type	Article

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