NDLI: Proceedings of the 2007 international workshop on System level interconnect prediction (SLIP '07)

Please wait, while we are loading the content...

Adaptable wire-length distribution with tunable occupation probability

Tutorial on congestion prediction

Principle hessian direction based parameter reduction forinterconnect networks with process variation

Networks on chips: keeping up with rent's rule and moore's law

Impact of interconnect length changes on effective materials properties (dielectric constant)

The nuts and bolts of physical synthesis

Stochastic interconnect layout sensitivity model

An accurate and efficient probabilistic congestion estimation model in x architecture

Statistical circuit optimization considering device andinterconnect process variations

Early wire characterization for predictable network-on-chip global interconnects

Modeling of the performance of carbon nanotube bundle, cu/low-k and optical on-chip global interconnects

Fast dual-vdd buffering based on interconnect prediction and sampling

Congestion estimation and localization in fpgas:: a visual tool for interconnect prediction

Synthetic traffic generation as a tool for dynamic interconnect evaluation

Exploiting on-chip data behavior for delay minimization

Proceedings of the 2007 international workshop on System level interconnect prediction (SLIP '07)

Content Provider	ACM Digital Library
Editor	Mandoiu, Ion Scheffer, L. Kennings, Andrew Mandoiu, I. Pan, D. Z. Kennings, A. Stroobandt, D. Markov, I.
Copyright Year	2007
Abstract	On behalf of the organizing committee, we would like to welcome you to the $9^{th}$ International Workshop on System-Level Interconnect Prediction (SLIP'07), held on March 17-18, 2007 at the Dolce Lakeway Resort and Spa in Austin, Texas. The SLIP workshop focuses on modeling and prediction of usable properties of optimized interconnect systems and their impact on system performance. Both theory and applications of interconnect prediction techniques are highlighted, with emphasis on applications to architectural and micro-architectural exploration, physical design, interconnect technology planning, and communication networks. In addition to the presentation of state-of-the-art papers in these fields, invited talks and tutorials by leading researchers aim to encourage dialogue between the architecture, physical design, and interconnect technology communities. Following a rigorous review process, the program committee has selected an outstanding set of 12 papers for publication in the proceedings and oral presentations at the workshop. The topics of selected papers cover a wide range of issues, including impact of new materials (e.g., low-k dielectrics, carbon nanotube bundles) on interconnect performance, congestion estimation and early interconnect characterization and planning, and the impact of process variation on interconnect performance. In addition to the contributed papers, we continue the SLIP tradition of featuring in the technical program several distinguished invited speakers. This year Avinoam Kolodny from Technion will speak about networks on chips, Majid Sarrafzadeh from UCLA will give a tutorial on congestion prediction, and Charles Alpert from IBM Austin Research Laboratory will speak on physical synthesis.
ISBN	9781595936226
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2007-03-17
Access Restriction	Subscribed
Content Type	Text
Resource Type	Conference Proceedings

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in