NDLI: Proceedings of the 2005 international workshop on System level interconnect prediction (SLIP '05)

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High-performance ULSI: the real limiter to interconnect scaling

Prediction of delay time for future LSI using on-chip transmission line interconnects

Dealing with interconnect process variations

Predicting interconnect requirements in ultra-large-scale integrated control logic circuitry

Dealing with the spatio-temporal interactions among transient power, supply noise and timing

A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool

Interconnect and current density stress: an introduction to electromigration-aware design

Congestion prediction in early stages

Predictions of CMOS compatible on-chip optical interconnect

Prediction model for evaluation of reconfigurable interconnects in distributed shared-memory systems

The impact of interstratal interconnect density on the performance of three-dimensional integrated circuits

Is probabilistic congestion estimation worthwhile?

Package level interconnect options

Multilevel full-chip routing with testability and yield enhancement

Proceedings of the 2005 international workshop on System level interconnect prediction (SLIP '05)

Content Provider	ACM Digital Library
Editor	Scheffer, Lou Zarkesh-Ha, Payman Hutton, Mike Markov, Igor Sylvester, Dennis Stroobandt, Dirk Farrahi, Amir Davis, Jeffrey
Copyright Year	2005
Abstract	On behalf of the organizing committee, we would like to welcome you to the 2005 International Workshop on System-Level Interconnect Prediction (SLIP 2005) that will take place April 2-3 in San Francisco, California.At its inception in 1999, SLIP focused on early evaluation of new circuit and device architectures, performance estimation of micro-processors, as well as predictive layout tools and associated design methodologies for VLSI circuits. It also pioneered a vision of research in large-scale interconnect analysis, including statistical modelling and optimization, that combined a solid theoretical component with strong roots in practical aspects of chip design. In summary, SLIP research is based on extracting essential characteristics of large systems from traditional low-level descriptions, and abstract analysis of these characteristics with emphasis on useful predictions. The multi-disciplinary nature of interconnect analysis was an important part of the original research vision, and this shows in the diversity of invited speakers at past SLIPs --- ranging from process technologists to proponents of diagonal wires and experts in physical synthesis. Thanks to the efforts of many organizing committees, steered by Prof. Dirk Stroobandt of Ghent University, SLIP has always facilitated discussions and collaboration between experts in a number of fields. While the majority of talks at the most recent workshop dealt with computer hardware, 2004 marked the first coverage of wetware at SLIP when a neuroscientist gave a scintillating invited talk on system-level interconnect in the brain.In the meantime, the original vision of SLIP research has been largely turning into reality with FPGA vendors using Rentian analysis to define capacities of new devices, major EDA companies selling virtual prototyping tools for ASIC design, and technologists evaluating the impact of new materials using interconnect models originally reported at our workshop. Both industrial and academic participation are now on the rise, and newer topics popular at SLIP include optical interconnect, on-chip networks, information-theoretic analysis of communication channels, and reconfigurable devices.The technical program of SLIP 2005, composed by Mike Hutton of Altera, promises an exciting and productive workshop. Invited speakers from Sun Microsystems, Texas Instruments and IBM will discuss interconnect scaling and system-level implications of circuit physics that are increasingly apparent at newer technology nodes. The fourth invited speaker, from Dresden University, will introduce the SLIP audience to electromigration-aware design, common in automotive applications with high current densities. Regular papers contributed by researchers from three continents explore interconnect prediction and optimization, as well as probabilistic congestion estimation and three-dimensional interconnects.This year SLIP is co-located with ISPD 2005 in San Francisco and, as always, offers a solid value proposition to attendees. We hope you will find SLIP 2005 enjoyable and consider contributing your work to the program of SLIP 2006.
ISBN	1595930337
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2005-04-02
Access Restriction	Subscribed
Content Type	Text
Resource Type	Conference Proceedings

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