NDLI: A 76-dBm IIP2 down-conversion mixer for TD-SCDMA/RFID applications

Content Provider	Springer Nature Link
Author	Jiang, Ying Dan Zhang, Run Xi Shi, Chun Qi Lai, Zong Sheng
Copyright Year	2012
Abstract	This paper presents a semi-active in-phase/quadrature inductor-less down-conversion mixer. The mixer consists of an active trans-conductance stage, a passive current switching stage, and a trans-impedance stage. A complementary input architecture has been used to increase the trans-conductance for a given bias current. An on-chip prescaler is added to provide the balanced LO signals, while the CMFB circuit in trans-conductance stage is designed to enhance linearity. The chip was achieved in a 0.13 μm CMOS technology. It features 5 dB conversion gain over a broad range from 800 MHz to 2.1 GHz, which supports Chinese TD-SCDMA/RFID standards simultaneously. The maximum IIP2 is +76 dBm at 2.1 GHz and suitable for application within a direct-conversion receiver.
Starting Page	129
Ending Page	139
Page Count	11
File Format	PDF
ISSN	09251030
Journal	Analog Integrated Circuits and Signal Processing
Volume Number	72
Issue Number	1
e-ISSN	15731979
Language	English
Publisher	Springer US
Publisher Date	2012-02-12
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Semi-active mixer Quadrature CMOS radio frequency integrated circuit Direct-conversion receiver Input second-order intercept point TD-SCDMA RFID Circuits and Systems Electrical Engineering Signal, Image and Speech Processing
Content Type	Text
Resource Type	Article
Subject	Surfaces, Coatings and Films Signal Processing Hardware and Architecture

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