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High IIP2 CMOS doubly balanced quadrature sub-harmonic mixer for 5 GHz direct conversion receiver
| Content Provider | Semantic Scholar |
|---|---|
| Author | Upadhyaya, Parag |
| Copyright Year | 2005 |
| Abstract | by Parag Upadhyaya, M.S. Washington State University May 2005 Chair: Deukhyoun Heo This thesis presents a new low power and high IIP2 0.25-μm CMOS doubly balanced sub-harmonic mixer for 5 GHz Industrial Scientific Medical (ISM) band direct conversion zero IF receiver. Using a 1⁄2X LO frequency generation scheme the sub-harmonic mixer overcomes LO self-mixing problem common in conventional direct conversion receivers (DCR). Measurement shows the sub-harmonic mixer is able to achieve voltage conversion gain of 8.2 dB, input compression P1dB of –8 dBm, IIP3 of –2.5 dBm and IIP2 of 36 dBm while consuming only 1.35 mA of DC current. Measured results correlate well with simulated results where the mixer is able to achieve high IIP2 of 55.3 dBm, IIP3 of –6.5 dBm, P1dB of –12 dBm and voltage conversion gain of 8 dB including 1% gm mismatch, 0.5% load mismatch and 2o LO phase error. The mixer takes up less than 1mm 2 of silicon real estate including test die pads. This work also gives an overview of direct conversion RF transceiver architecture and its design challenges and potential solutions for addressing 1/f noise, DC offset, 3 rd order intermodulation products and more importantly 2 nd order intermodulation in the mixer. Two novel CMOS doubly balanced quadrature sub-harmonic mixer architectures, which have high |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.dissertations.wsu.edu/Thesis/Spring2005/p_upadhyaya_050505.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
