NDLI: New fully-differential amplifier-less pipelined ADC with wide power scalability and ERBW

Content Provider	Springer Nature Link
Author	Tang, Xian Pun, Kong Pang
Copyright Year	2014
Abstract	A new fully-differential energy-efficient amplifier-less technique for pipelined analog-to-digital converter (ADC) suitable for video signal conversion is presented in this paper. It employs a capacitive charge pump and a comparator-controlled charging buffer to realize the residue amplification. The circuit is differential and the common-mode input is rejected at the output, although no active common-mode feedback circuit is used. In principle, this technique eliminates static power consumption in the residue amplification process, leaving only the necessary dynamic power consumption, which is directly scalable to the sampling rate (f s ) like in a digital circuit. A prototype ADC was fabricated in a 1.8 V 0.18 µm CMOS technology. It consumes 54 µW at 125 kS/s and 4.94 mW at 25 MS/s while measuring a signal-to-noise-plus-distortion ratio of 52 dB, independent of f s . Furthermore, enabled by a built-in passive sample-and-hold, the ADC achieves a 36 MHz effective resolution bandwidth at 25 MS/s.
Starting Page	427
Ending Page	435
Page Count	9
File Format	PDF
ISSN	09251030
Journal	Analog Integrated Circuits and Signal Processing
Volume Number	80
Issue Number	3
e-ISSN	15731979
Language	English
Publisher	Springer US
Publisher Date	2014-07-15
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Pipelined ADC Amplifier-less Power scalability Effective resolution bandwidth (ERBW) Circuits and Systems Electrical Engineering Signal, Image and Speech Processing
Content Type	Text
Resource Type	Article
Subject	Surfaces, Coatings and Films Signal Processing Hardware and Architecture

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