NDLI: Practical approach to power integrity-driven design process for power-delivery networks

Content Provider	IET Digital Library
Author	Ko, Baekseok Kim, Joowon Ryoo, Jaemin Hwang, Chulsoon Kwon, Chan Keun Kim, Soo Won
Abstract	The authors present a practical design process that considers the power noise problem in CPU blocks for application processors used in smart TVs. The target impedance is determined by modelling the RLC circuit of a system-on-chip power net. The target impedance of a power delivery network is then determined by applying the extracted chip current profile for finalising the design budget. The authors modelled the on-chip power net by combining vector network analyser measurements with an on-chip model for power integrity analysis. The authors demonstrated the optimisation and design strategy by using a ball grid array ball interconnection and case studies on the placement of multilayer ceramic capacitors. The simulation results showed good agreement with the measurement results. The error in the minimum value (negative direction) by voltage droop was less than 8.6%, while the difference in voltage noise ripple was 2.69% for a criterion of 1.1 V assuming a worst-case condition of 1.2 V.
Starting Page	448
Ending Page	455
Page Count	8
ISSN	1751858X
Volume Number	10
e-ISSN	17518598
Issue Number	Issue 5, Sep (2016)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/10/5
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2015.0285
Journal	IET Circuits, Devices & Systems
Publisher Date	2016-09-01
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Application Processors Ball Grid Array Ball Grid Array Ball Interconnection Capacitor Ceramic Capacitor Chip Current Profile Circuit Optimisation CPU Blocks Digital Circuit Design, Modelling And Testing Digital Television Integrated Circuit Design Integrated Circuit Interconnections Integrated Circuit Modelling Integrated Circuit Noise Microprocessor Chips Microprocessors And Microcomputer Multilayer Ceramic Capacitor Network Analysers Network And Spectrum Analysers On-chip Model Power Integrity Analysis Power Integrity-driven Design Process Power Noise Problem Power-delivery Network Product Packaging RLC Circuit Smart TV System And Application System-on-chip System-on-chip Power Net Television And Video Equipment Vector Network Analyser Measurement Voltage 1.1 V Voltage 1.2 V Voltage Droop Voltage Noise Ripple
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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