NDLI: Performance analysis of junctionless DG-MOSFET-based 6T-SRAM with gate-stack configuration

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The Journal of Engineering

Performance analysis of junctionless DG-MOSFET-based 6T-SRAM with gate-stack configuration

Content Provider	IET Digital Library
Author	Tayal, Shubham Nandi, Ashutosh
Abstract	In this work, the investigation of high-K gate-stack-based junctionless (JL) double-gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET) is carried out to study the high-K gate dielectric effect on six-transistor (6T)-static random-access memory (SRAM) built with JLDG-MOSFET. It is observed that the utilisation of the high-K gate dielectric in JLDG-MOSFETs improves the static noise margin (SNM) that is the stability of the cell as well as access time (AT) which reflects the delay performance of the SRAM cell. Furthermore, scaling down of Lg degrades the stability. Moreover, it is also described that the enhancement in hold SNM (ΔHSNM = HSNM(K=40)−HSNM(K=3.9)), read SNM (ΔRSNM = RSNM(K=40)−RSNM(K=3.9)), and write SNM (ΔWSNM = WSNM(K=40)−WSNM(K=3.9)) is restricted at lower Lg without much enhancement in the improvement of read AT and write AT. Therefore, it is appropriate to consider higher channel length (∼30 nm) while designing high-K gate-stacked-based JLDG-MOSFETs for the 6T-SRAM cell.
Starting Page	838
Ending Page	841
Page Count	4
Volume Number	13
e-ISSN	17500443
Issue Number	Issue 6, Jun (2018)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/mnl/13/6
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/mnl.2017.0702
Journal	Micro & Nano Letters
Publisher Date	2018-06-01
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Access Time Dielectric Device Gate-stack Configuration High-k Gate-stack-based JLDG-MOSFET-based 6T-SRAM Cell Insulated Gate Field Effect Transistors Junctionless Double-gate Metal-oxide-semiconductor Field-effect Transistor Memory Circuit MOSFET Other Dielectric Application And Device Semiconductor Device Noise Six-transistor Static Random-access Memory SNM SRAM Chips Stability Static Noise
Content Type	Text
Resource Type	Article

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