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| Content Provider | IET Digital Library |
|---|---|
| Author | Jiang, Wenjian Yu, Fengqi |
| Abstract | A dual-modulus prescaler based on true single-phase clock D flip-flop is presented. Instead of using the conventional digital logic circuit, the pass transistor logic circuit is applied to reduce the number of the transistors and the power of the divider. By adding only two additional transistors, a dual-modulus operation is achieved. Implemented in a standard 180 nm CMOS process, the proposed divide-by 6/7/8 prescaler based on the proposed dual-modulus one achieves an operating frequency of 4.2 GHz with a measured power consumption of 0.81 mW for a 1.2 V supply. |
| Starting Page | 1007 |
| Ending Page | 1008 |
| Page Count | 2 |
| ISSN | 00135194 |
| Volume Number | 52 |
| e-ISSN | 1350911X |
| Issue Number | Issue 12, Jun (2016) |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/el/52/12 |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/el.2016.0672 |
| Journal | Electronics Letters |
| Publisher Date | 2016-05-13 |
| Access Restriction | Open |
| Rights Holder | © The Institution of Engineering and Technology |
| Subject Keyword | Clocks CMOS CMOS Integrated Circuit CMOS Logic Circuit Digital Circuit Divider Dual-modulus Operation Flip Flops Frequency 4.2 GHz Logic And Switching Circuit Logic Circuit Pass Transistor Logic Circuit Power 0.81 MW Power Consumption Prescalers Size 180 Nm Triple-modulus Prescaler True Single-phase Clock D Flip-flop Voltage 1.2 V |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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