NDLI: Precharge free dynamic content addressable memory

Content Provider	IET Digital Library
Author	Mahendra, T. V. Hussain, S. W. Mishra, S. Dandapat, A.
Abstract	A precharge free dynamic content addressable memory (DCAM) is introduced for low-power and high-speed search applications. Elimination of precharge prior to search allows hardware engine to perform more number of searches within the stipulated time. The proposed DCAM cell not only removes precharge of matchline (ML) but also utilises decoupling of bitline and searchline so that unwanted capacitive couplings are minimised at charge storage nodes. A 512 bit of the proposed scheme is implemented using 45 nm CMOS technology and its efficacy is verified and proved through rigorous variations with 1000-point Monte-Carlo sampling of ML voltage as well as multi-search dissipation analysis.
Starting Page	556
Ending Page	558
Page Count	3
ISSN	00135194
Volume Number	54
e-ISSN	1350911X
Issue Number	Issue 9, May (2018)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/el/54/9
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/el.2018.0592
Journal	Electronics Letters
Publisher Date	2018-03-27
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	1000-point Monte-Carlo Sampling Associative Storage Bitline Decoupling Charge Storage Nodes CMOS Integrated Circuit CMOS Memory Circuit CMOS Technology Content-addressable Storage DCAM Cell Hardware Engine High-speed Search Application Low Power Electronics Low-power Application Match Line Memory Circuit ML Voltage Monte Carlo Method Multisearch Dissipation Analysis Precharge Free Dynamic Content Addressable Memory Searchline Decoupling Semiconductor Storage Size 45 Nm Storage Capacity 512 Bit Unwanted Capacitive Couplings
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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