NDLI: Determination of worst case input combinations of nanoscale circuits using Bayesian networks

Content Provider	IEEE Xplore Digital Library
Author	Khalid, U. Anwer, J. Singh, N. Hamid, N.H. Asirvadam, V.S.
Copyright Year	2012
Description	Author affiliation: Electrical & Electronics Engineering Department, UniversitiTeknologi PETRONAS (UTP), 31750, Bandar Seri Iskandar, Perak, Malaysia (Khalid, U.; Anwer, J.; Singh, N.; Hamid, N.H.; Asirvadam, V.S.)
Abstract	As MOSFETs are scaled down to nanometer dimensions, their performances and behaviours become less predictable. Designing reliable circuit or systems using these nano-transistors (nano-circuits or systems) post new challenges and require paradigm shift in design techniques, process and flow. In conventional circuits, the inputs of digital circuits were deterministic but as MOSFET technology enter into nanoscale dimensions, the behaviour of inputs become probabilistic in nature. The major source of distorted inputs are the transient errors and signal noises. The probabilistic inputs' random behaviour needs to be modelled into softwares so that a circuit designer can predict the exact reason of reliability-degradation. These probabilistic inputs can be modelled mathematically in the form of distributed inputs and called as Probabilistic Digital Inputs (PDIs). This research work shows the modelling of probabilistic inputs to determine their worst and best case input combinations for few benchmark circuits.
Starting Page	761
Ending Page	764
File Size	143775
Page Count	4
File Format	PDF
ISBN	9781457719684
e-ISBN	9781457719677
DOI	10.1109/ICIAS.2012.6306115
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-06-12
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Bayesian methods Probabilistic digital input Worst-case input combination Probabilistic logic Nanoscale devices Bayesian networks Reliability Integrated circuit reliability Integrated circuit modeling Adders
Content Type	Text
Resource Type	Article

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