NDLI: An Efficient Graph Isomorphism Algorithm Based on Canonical Labeling and Its Parallel Implementation on GPU

Content Provider	IEEE Xplore Digital Library
Author	Renda Wang Longjiang Guo Chunyu Ai Jinbao Li Meirui Ren Keqin Li
Copyright Year	2013
Description	Author affiliation: Sch. of Comput. Sci. & Technol., Heilongjiang Univ., Harbin, China (Renda Wang; Longjiang Guo; Jinbao Li; Meirui Ren) \|\| Dept. of Comput. Sci., Univ. of South Carolina Upstate, Spartanburg, SC, USA (Chunyu Ai) \|\| Dept. of Comput. Sci., State Univ. of New York, New Paltz, NY, USA (Keqin Li)
Abstract	The Graph Isomorphism (GI) problem has been extensively studied due to its significant applications. The most effective class of GI algorithms, i.e., canonical labeling algorithms, are suitable for either graphs with high randomness or symmetry, or graphs for which both of them are not strongly held. Also, the core operations of canonical labeling algorithms, i.e., individuation-refinement (IR) and certificate comparison, usually occupy more than 70% of the total running time. How to weaken the limitations of structures and improve the efficiency of these operations are challenges. In this paper, we present an efficient GI algorithm called PEACE, which is particularly suitable for graphs with high randomness or symmetry. We present a parallel implementation of our algorithm on GPUs. We design some new techniques and also use some existing methods to speed up calculations under CUDA. More importantly, these techniques can be applied to all IR-based GI algorithms. We evaluate the proposed algorithm on various graphs to make comprehensive comparison with currently the most efficient canonical labeling algorithms on CPUs. Experimental results show that PEACE is superior to other algorithms on graphs with high symmetry or many automorphisms, and up to 50% performance increase can be achieved in the best case. We also apply our parallel techniques on these algorithms, and compare the performance on CPU and multiple GPU devices. The results show that the techniques make all algorithms gain 15~55 speedup.
Sponsorship	IEEE Comput. Soc.
Starting Page	1089
Ending Page	1096
File Size	431412
Page Count	8
File Format	PDF
ISBN	9780769550886
DOI	10.1109/HPCC.and.EUC.2013.154
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-11-13
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis CUDA Instruction sets Graph isomorphism Graphics processing units Canonical labeling Partitioning algorithms Labeling Indexes Arrays GPU
Content Type	Text
Resource Type	Article

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