NDLI: Exclusive Memory Scheduling for Multimedia MPSoC

Content Provider	IEEE Xplore Digital Library
Author	Su Liu Menghao Su Ruiyang Wu Lei Li
Copyright Year	2013
Description	Author affiliation: State Key Lab. of Comput. Archit., Beijing, China (Su Liu; Menghao Su; Ruiyang Wu; Lei Li)
Abstract	Multimedia MPSoC (Multi-Processor System-on-Chip) has been widely used in today's consumer electronics. As many memory intensive IP (Intellectual Property) cores are integrated into a single chip, the performance of shared memory has been a critical issue. Conventional memory scheduling policies just schedule the existing requests in the queue and waste the potential scheduling space because they don't use the features of memory access modules. Existing policies often have to take a tradeoff between performance and QoS (Quality-of-Service). In this paper, we propose an exclusive memory scheduling policy by the observation of memory locality and latency tolerance of multimedia modules. We build a window mechanism and make IP cores monopolize the memory bus round-robin to get both performance and fairness. The experiment results show that the proposed scheduling policy improves the system bandwidth by 36.5% and reduces CPU latency by 29% under heaviest workload compared to a QoS-based control policy. In addition, our policy has low hardware cost and can cooperate with other schedulers.
Sponsorship	IEEE Comput. Soc.
Starting Page	2022
Ending Page	2026
File Size	447499
Page Count	5
File Format	PDF
ISBN	9780769550886
DOI	10.1109/HPCC.and.EUC.2013.291
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-11-13
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Processor scheduling Random access memory Bandwidth Quality of service Streaming media Scheduling Multimedia communication
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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