NDLI: STARC's Semiconductor Design Technology Research Activities and the HiSIM2 Advanced MOSFET Model Project

Content Provider	IEEE Xplore Digital Library
Author	Furui, Y. Miura-Mattausch, M. Sadachika, N. Miyake, M. Ezaki, T. mattausch, H.J. Ohguro, T. Iizuka, T. Inagaki, R. Fudanuki, N.
Copyright Year	2007
Description	Author affiliation: Hiroshima Univ., Hiroshima (Furui, Y.; Miura-Mattausch, M.; Sadachika, N.; Miyake, M.; Ezaki, T.)
Abstract	STARC (Semiconductor Technology Academic Research Center) is a research consortium co-founded by major Japanese semiconductor companies, whose mission is to contribute to the growth of the Japanese semiconductor industry by developing leading-edge SoC design technologies. One of the achievements enabled by the academia collaboration is HiSIM (Hiroshima University STARC IGFET Model) an advanced MOSFET Model. The HiSIM2 version includes required features in modeling for the 45 nm technology node and beyond such as the STI effect. A major development is an improved model consistency, which enables even modeling of the technology variation accurately. HiSIM2 realizes both accurate and fast circuit simulation.
Starting Page	41
Ending Page	46
File Size	770452
Page Count	6
File Format	PDF
ISBN	8392263243
DOI	10.1109/MIXDES.2007.4286118
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-06-21
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	Tech Univ of Lodz Dept of Microelectronics & Computer Science
Subject Keyword	Circuit simulation Companies Calculation speed Lead compounds Analog & RF application Radio frequency STARC Consortium Electronics industry Collaboration MOSFET circuits Silicon Consumer electronics MOSFET model Surface potential Testing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

MOSFET Modeling Beyond 100nm Technology: Challenges and Perspectives

Tests on Symmetry and Continuity between BSIM4 and BSIM5

HiSIM2: Advanced MOSFET Model Valid for RF Circuit Simulation

Moderate inversion: Analog and RF benchmarking with the EKV3 compact model

An efficient physically-based MOSFET model for RF circuit design

Analysis of balance management at the leading edge — competition and collaboration for semiconductor industry

Collaborative semiconductor research in Japan

EKV3 Parameter Extraction and Characterization of 90nm RF-CMOS Technology

Lateral compensation structures can break the silicon limit

STARC's Semiconductor Design Technology Research Activities and the HiSIM2 Advanced MOSFET Model Project

Similar Documents

MOSFET Modeling Beyond 100nm Technology: Challenges and Perspectives

Tests on Symmetry and Continuity between BSIM4 and BSIM5

HiSIM2: Advanced MOSFET Model Valid for RF Circuit Simulation

Moderate inversion: Analog and RF benchmarking with the EKV3 compact model

An efficient physically-based MOSFET model for RF circuit design

Analysis of balance management at the leading edge — competition and collaboration for semiconductor industry

Collaborative semiconductor research in Japan

EKV3 Parameter Extraction and Characterization of 90nm RF-CMOS Technology

Lateral compensation structures can break the silicon limit

STARC's Semiconductor Design Technology Research Activities and the HiSIM2 Advanced MOSFET Model Project