NDLI: Design space exploration of row buffer architecture for phase change memory with LPDDR2-NVM interface

Content Provider	IEEE Xplore Digital Library
Author	Jaehyun Park Donghwa Shin Hyung Gyu Lee
Copyright Year	2015
Description	Author affiliation: Sch. of CCE, Daegu Univ., Gyeongsan, South Korea (Hyung Gyu Lee) \|\| Dept. of EECS, Seoul Nat. Univ., Seoul, South Korea (Jaehyun Park) \|\| Dept. of Comput. Eng., Yeungnam Univ., Gyeongsan, South Korea (Donghwa Shin)
Abstract	Phase change memory (PCM) is an attractive candidate for the future memory, but it still has several limitations to overcome such as write latency and long-term endurance. A large body of literature has been dedicated to solving these problems. However, almost all of the previous studies did not consider an important practical aspect of the PCM - an interface. The LPDDR2-NVM standard interface recently introduced by JEDEC is widely adopted by the manufacturers of commercial PCM these days. The LPDDR2-NVM standard allows a more flexible use of row buffers compared to the conventional DRAM interface. In this paper, we explore the design space of row buffer architecture in the PCM with LPDDR2-NVM interface. The effect of row buffer architecture on memory performance is investigated in terms of unit size and number of RDBs, and its management policy. We use the timing parameters from industry prototype PCM and analyze the result from the perspective of Pareto's optimum. The experimental results show that a properly-designed row buffer architecture enhances system-level performance up to 44.2% even at the same cost.
Starting Page	104
Ending Page	109
File Size	1061005
Page Count	6
File Format	PDF
ISSN	23248440
e-ISBN	9781467391405
DOI	10.1109/VLSI-SoC.2015.7314400
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-10-05
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Phase change materials Memory management Random access memory Prototypes Space exploration Standards
Content Type	Text
Resource Type	Article

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