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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yang, S.F. Chien, W.-T.K. |
| Copyright Year | 2009 |
| Description | Author affiliation: Semiconductor Manufacturing International Corporation (SMIC), Corporate Quality-Reliability Center, 18 Zhangjiang Road, Shanghai, China 201203 (Yang, S.F.; Chien, W.-T.K.) |
| Abstract | The failure rate has been an important index in product reliability. Practitioners in microelectronics reliability have been using JEDEC standards to determine whether a product will pass the requirement of a prespecified failure rate. The limitation of the current $X^{2}$ method used by JESD74 and its revision JESD74A in determining the upper confidence limit for failure rate is pointed out and discussed. Very large relative errors such as 40% have been shown for certain sample sizes which are not sufficiently large enough. This paper provides practitioners an exact method to calculate the confidence bounds of failure rates and therefore makes JESD74 and its revision JESD74A complete to any sample size |
| Starting Page | 204 |
| Ending Page | 207 |
| File Size | 601564 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424448692 |
| DOI | 10.1109/IEEM.2009.5373384 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-12-08 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Semiconductor device reliability Life testing Electronic components $X^{2}$ method Hazards Microelectronics Solid state circuits Failure rate Statistics accelerated life test confidence limits Electronics industry Life estimation Semiconductor device manufacture exact F method sample size |
| Content Type | Text |
| Resource Type | Article |
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