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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Becker, K. Timmy Lin |
| Copyright Year | 2003 |
| Description | Author affiliation: Ablestik, Rancho Dominguez, CA, USA (Becker, K.) |
| Abstract | The dominant trend in packaging DDR DRAM for the future is the face down substrate-on-chip configuration. For this type of package it is critical that the die attach method employed provide precise control of bond line thickness and die tilt, minimal fillet, and prevent contamination of the wire bond pads located on the edge of the center wire bond channel. To date, a film adhesive has been the die attach method of choice because it is well suited to meet those requirements. Unfortunately, films are quite expensive compared to die attach pastes in terms of material, process, and tooling costs. This is especially true when changes such as die shrinks and board redesigns mandate a taping tool change. To address this serious issue, a novel series of printable B-stage adhesives has been developed that deliver the performance of a film (with respect to bond line and flow control), with the low cost of a paste (in terms of tooling and materials).In this paper, we will present data on a commercial series and a developmental series of printable adhesives, which were developed specifically for substrate-on-chip packages. These proprietary adhesives are formulated to be stencil printed on a substrate and then B-staged. The printed substrates then replace the standard pre-taped substrates that represent the mainstream in DRAM packaging. Data show that these printable adhesives deliver the performance of films, i.e. low flow and bond-line control on die attach, more than a six month storage life at room temperature, and do not require substrate pre-drying. ChipMOS Technologies has pioneered the assembly process using these adhesives and are seeing high UPH and equivalent reliability performance to film adhesives. Key in-package reliability data from those evaluations will be presented. |
| Sponsorship | IEEE Electron Devices Soc. Micron Found. IEEE EDS Boise Chapter Boise State Univ |
| Starting Page | 250 |
| Ending Page | 255 |
| File Size | 420284 |
| Page Count | 6 |
| File Format | |
| ISBN | 0780379721 |
| ISSN | 07496877 |
| DOI | 10.1109/UGIM.2003.1225737 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2003-07-02 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Microassembly Packaging Bonding Substrates Random access memory Wire Costs Thickness control Contamination Temperature control |
| Content Type | Text |
| Resource Type | Article |
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