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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Wrinn, J. |
| Copyright Year | 1995 |
| Description | Author affiliation: Assembly Test, Teradyne Inc., Walnut Creek, CA, USA (Wrinn, J.) |
| Abstract | The author describes the principles, implementation, strengths, weaknesses and applications of two vectorless test techniques developed by Teradyne. Examples drawn from users' experience demonstrate how unpowered testing can dramatically reduce test cost and cycle time while maintaining or improving fault coverage. Analog junction test (AJT) and RF induction test (RFIT) form part of Teradyne's vectorless test toolset. AJT uses simple analog characterization of pin pairs on the device, relying on the protection or parasitic diode in most devices to produce the signal that indicates correct board assembly. RFIT uses RF induction into the device-under-test from an overhead inducer. Detection of the induced AC signal on the device pins via the standard bed-of-nails fixture indicates good board assembly. Both AJT and RFIT offer entirely new capability to the test engineer in that they can detect resistive cold solder joints. These faults would otherwise pass a traditional vector test or even a functional test, while risking field failures. |
| File Size | 103445 |
| File Format | |
| ISBN | 0780329929 |
| ISSN | 10893539 |
| DOI | 10.1109/TEST.1995.529936 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1995-10-21 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Printed circuits Circuit testing Circuit faults Radio frequency Assembly Costs Protection Diodes Pins Fixtures |
| Content Type | Text |
| Resource Type | Article |
| Subject | Applied Mathematics Electrical and Electronic Engineering |
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