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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Khanapurkar, Milind Rewatkar, Rajendra Bajaj, Preeti |
| Copyright Year | 2010 |
| Description | Author affiliation: Department of Electronics and Telecommunication Engineering, G. H. Raisoni College of Engineering, Nagpur - 16 India (Khanapurkar, Milind; Rewatkar, Rajendra; Bajaj, Preeti) |
| Abstract | Paper presents design approach of automotive network controller based black box. As the proposed black box design is network controller based, the FPGA implementation of LIN controller on Xilinx ISE 9.1i Model-Sim with Spartan 3 FPGA is presented. The FPGA synthesis results of communication between LIN modules in Master/Slave mode have been presented. In order to build the LIN network consisting of one master and multiple slaves (2), three LIN controllers are downloaded on Cyclone II FPGA of ALTREA QUARTUS-II platform. The network thus obtained is verified and results for data transfer amongst the nodes are implemented successfully. This interface is initial step for building LIN network blocks in single master and multiple slave nodes and can be used in automotive emergency signals transmission in vehicular security system and post accidental analysis. |
| Starting Page | 815 |
| Ending Page | 822 |
| File Size | 1264952 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781424468898 |
| e-ISBN | 9781424468904 |
| DOI | 10.1109/TENCON.2010.5686581 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-11-21 |
| Publisher Place | Japan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Vehicles Registers Field programmable gate arrays Simulation Transceivers Vehicle crash testing SRAM: Static Random Access Memory SDM: Sensing and Diagnostic module EDR: Event Data Recorder BB: Black Box LIN: Local Interconnect Network CAN: Controller Area Network FPGA: Field Programmable Gate Array VHDL: Very High Speed Hardware Descripton Languge SOC: System On Chip |
| Content Type | Text |
| Resource Type | Article |
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