NDLI: An all-digital ΔΣ envelope modulator for EER-based transmitters based on CMOS standard cell design

Content Provider	IEEE Xplore Digital Library
Author	Chien-Hung Kuo Shu-Li Liao
Copyright Year	2011
Description	Author affiliation: Dept. Applied Electronics Technology, National Taiwan Normal University, Taipei, Taiwan, R.O.C. (Chien-Hung Kuo; Shu-Li Liao)
Abstract	This paper presents an all-digital 4-bit delta-sigma (ΔΣ) modulator for envelope elimination and restoration (EER)-based polar transmitters. A fast feedback approach is devised by combining the digital truncator with path gains to reduce the propagation delay of feedback loops in modulators. The CMOS standard cell-based design could hence be utilized to implement the proposed modulator at a sampling frequency of 182 MHz. The noise transfer function of the presented ΔΣ modulator has been optimized to obtain a maximally flat noise band to easily meet the EDGE spectrum mask. Experiment results show the presented ΔΣ modulator has the noise power beneath −60 dB below the full-scale EDGE signal within ±20 MHz of the carrier frequency. The measured adjacent channel power ratios and alternate channel power ratio of the proposed modulator also give a 6 dB margin to the EDGE specification at 400 kHz and 600 kHz offsets.
Starting Page	325
Ending Page	328
File Size	320572
Page Count	4
File Format	PDF
ISBN	9781612841359
e-ISBN	9781612841373
DOI	10.1109/NEWCAS.2011.5981321
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-06-26
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Noise Frequency modulation Transmitters Feedback loop Frequency measurement Floors
Content Type	Text
Resource Type	Article

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