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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yu-Kai Chou Yue Feng Yu-Hsin Lin Cong Liu Chen-Yen Ho Bo Hu Jun Zha Chuang, S. |
| Copyright Year | 2014 |
| Description | Author affiliation: Mediatek Inc., China (Yu-Kai Chou; Yue Feng; Yu-Hsin Lin; Cong Liu; Chen-Yen Ho; Bo Hu; Jun Zha) || Econet Inc., Taiwan (Chuang, S.) |
| Abstract | This paper presents a high linear analog front-end (AFE) for ADSL/ADSL2+ system applications. This AFE has the overall linearity of -93.5dB to ensure the ADSL/ADSL2+ modem to achieve up to 27.2Mbps down-stream data-rate on short loops. The AFE is implemented in two chips using 0.11um/55nm CMOS process with integrated power management unit (PMU) to optimize the data-rate, die area and power efficiency. The choice of the process is a compromise between the size of the digital circuits, and the analog performance and cost. Furthermore, a 90dB dynamic range (DR) CTSDM ADC is employed to relax the requirement of the front-end filters of the receiver, and thus the filter orders are reduced as well as the area and power consumption. The transmit path can achieve 90dB SNR and -95.2dB THD. The receive path can achieve 82.1dB SNR and -93.5dB THD. The AFE including line driver using the dual-chip solution dissipates 590 mW from 3.3V/5 V supply. |
| Starting Page | 113 |
| Ending Page | 116 |
| File Size | 553147 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781479940905 |
| e-ISBN | 9781479940899 |
| DOI | 10.1109/ASSCC.2014.7008873 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-11-10 |
| Publisher Place | Taiwan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Filter ADSL AFE DMT PMU ADC DAC |
| Content Type | Text |
| Resource Type | Article |
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