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Content Provider | IEEE Xplore Digital Library |
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Author | Bong Tae Park Jai Hyuk Song Eun Suk Cho Seung Wan Hong Jae Youn Kim Yong Ju Choi Yong Seok Kim Seung Jun Lee Chi Kyoung Lee Dae Woong Kang Dong Jun Lee Byoung Taek Kim Yong Joon Choi Woon Kyung Lee Jeong-Hyuk Choi Kang-Deog Suh Tae-Sung Jung |
Copyright Year | 2010 |
Description | Author affiliation: Flash Process Architecture Team, Flash Development Center, Samsung Electronics Co., San #24, Nongseo-Dong, Giheung-Ku, Yongin-City, Gyenggi-Do, 449-711, South Korea (Bong Tae Park; Jai Hyuk Song; Eun Suk Cho; Seung Wan Hong; Jae Youn Kim; Yong Ju Choi; Yong Seok Kim; Seung Jun Lee; Chi Kyoung Lee; Dae Woong Kang; Dong Jun Lee; Byoung Taek Kim; Yong Joon Choi; Woon Kyung Lee; Jeong-Hyuk Choi; Tae-Sung Jung) || Department of Semiconductor systems engineering, Sungkyunkwan University, Suwon, 440-746, South Korea (Kang-Deog Suh) |
Abstract | 32nm 3-bit 32Gb NAND Flash Memory for mass production has been successfully developed for the first time. To shorten the development time and lower the cost, one side double patterning technology in a gate direction and the minimum number of spare blocks have been adopted. Additionally, considering endurance and data retention of cell characteristics, the optimal gate and active lengths are fixed in a stage of device design. |
Starting Page | 125 |
Ending Page | 126 |
File Size | 321246 |
Page Count | 2 |
File Format | |
ISBN | 9781424454518 |
e-ISBN | 9781424454501 |
DOI | 10.1109/VLSIT.2010.5556196 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2010-06-15 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Logic gates Flash memory Doping Mass production Semiconductor device reliability Computer architecture |
Content Type | Text |
Resource Type | Article |
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