NDLI: ULSNAP: An ultra-low power event-driven microcontroller for sensor network nodes

Content Provider	IEEE Xplore Digital Library
Author	Otero, C.T.O. Tse, J. Karmazin, R. Hill, B. Manohar, R.
Copyright Year	2014
Description	Author affiliation: Comput. Syst. Lab., Cornell Univ., Ithaca, NY, USA (Otero, C.T.O.; Tse, J.; Karmazin, R.; Hill, B.; Manohar, R.)
Abstract	We present the architecture of and measured results for ULSNAP: a fully-implemented ultra-low power event-driven microcontroller targeted at the bursty workloads of the sensor network application space. ULSNAP is event-driven at both the microarchitectural and circuit levels in order to minimize static power, energy per operation, and wake up energy while maximizing performance. Our 90nm test chip offers 93 MIPS at 1.2V and 47 MIPS at 0.95V, consuming 47pJ and 29pJ per operation respectively. Compared to state-of-the-art processors in its class, ULSNAP is on the Pareto-optimal front of the energy-performance space.
Starting Page	667
Ending Page	674
File Size	463061
Page Count	8
File Format	PDF
e-ISBN	9781479939466
DOI	10.1109/ISQED.2014.6783391
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-03-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Radiation detectors Synchronization Pipelines Coprocessors Delays Random access memory Cogeneration Ubiquitous Computing VLSI Low power electronics Microprocessors Microcontrollers
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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ULSNAP: An ultra-low power event-driven microcontroller for sensor network nodes