NDLI: Linearly separable pattern classification using memristive crossbar circuits

Content Provider	IEEE Xplore Digital Library
Author	Singh, K. Sahu, C. Singh, J.
Copyright Year	2014
Description	Author affiliation: Dept. of ECE, IIITDM Jabalpur, Jabalpur, India (Singh, K.; Sahu, C.; Singh, J.)
Abstract	This paper presents a practical approach for the classification of linearly separable patterns using a single-layer perceptron network implemented with a memristive crossbar circuit (synaptic network) and a CMOS Op-Amps based neuron. Memristors (resistors with memory) promise the efficient implementation of synapses in artificial neural networks, as they bears astonishing resemblance to the biological synapses in its functionality, performance and integration capability. The proposed design of memristive perceptron is implemented in HSPICE and trained using the Matlab software by applying the perceptron learning rule. In order to analyze the performance of the proposed memristive crossbar circuit based perceptron design, a comparison is made with the existing MOS technology based synaptic network design. The simulation results thus obtained motivate the efficient implementation of sophisticated multi-layer neuromorphic systems with memristive crossbar circuits in the near future.
Starting Page	323
Ending Page	329
File Size	428065
Page Count	7
File Format	PDF
e-ISBN	9781479939466
DOI	10.1109/ISQED.2014.6783343
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-03-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Memristors Training Neurons Logic gates CMOS integrated circuits Biological neural networks Threshold voltage CMOS neuron Memristor neural network perceptron synaptic weight combinational logic linearly separable dataset learning rule
Content Type	Text
Resource Type	Article

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