NDLI: SOI LIGBT devices with a dual P-well implant for improved latching characteristics

Content Provider	IEEE Xplore Digital Library
Author	Disney, D.R. Plummer, J.D.
Copyright Year	1993
Description	Author affiliation: Stanford Univ., CA, USA (Disney, D.R.; Plummer, J.D.)
Abstract	The authors explore the inherent tradeoff between latching current density and threshold voltage in a typical lateral insulated-gate bipolar transistor (LIGBT), which uses a shallow implant and long drive-in to form its P-well. The latching performance of LIGBTs in silicon-on-insulator (SOI) substrates is compared to that of equivalent devices in bulk silicon. Two techniques are proposed for improving the latchup/threshold tradeoff in these SOI devices. Retrograde P-well implants are shown to yield significant improvements while adding little complexity to the fabrication process. Dual P-well implants are shown to effectively decouple the latching current from the threshold voltage, yielding LIGBTs with latching current densities over 1300 A/cm/sup 2/.
Starting Page	254
Ending Page	258
File Size	532002
Page Count	5
File Format	PDF
ISBN	0780313135
ISSN	10636854
DOI	10.1109/ISPSD.1993.297132
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1993-05-18
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Implants Anodes Current density Thyristors Silicon on insulator technology Threshold voltage Conductivity Insulation Insulated gate bipolar transistors Fabrication
Content Type	Text
Resource Type	Article

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SOI LIGBT devices with a dual P-well implant for improved latching characteristics