NDLI: Impact of lateral charge migration on the retention performance of planar and 3D SONOS devices

Content Provider	IEEE Xplore Digital Library
Author	Maconi, A. Arreghini, A. Compagnoni, C.M. Van den bosch, G. Spinelli, A.S. Van Houdt, J. Lacaita, A.L.
Copyright Year	2011
Description	Author affiliation: IMEC, Kapeldreef 75, B-3001 Leuven, Belgium (Arreghini, A.; Van den bosch, G.; Van Houdt, J.) \|\| Dipartimento di Elettronica e Informazione, Politecnico di Milano - IU.NET, Via Golgi 40, 20133 Milano, Italy (Maconi, A.; Compagnoni, C.M.; Spinelli, A.S.; Lacaita, A.L.)
Abstract	This paper investigates the impact of lateral charge migration on the retention performance of charge-trap memories whose storage layer is not patterned self-aligned with the channel area of each cell. Experimental results on planar SONOS devices, revealing an important contribution of lateral charge migration at 150 °C, are used to calibrate a new numerical model accounting for both the vertical and the lateral charge loss from the silicon nitride. Modeling results allow a detailed analysis of the retention transients of both planar and 3D SONOS arrays, evaluating, for the latter, the minimum dimensions needed to fulfill the retention requirements at 85 °C.
Starting Page	195
Ending Page	198
File Size	353613
Page Count	4
File Format	PDF
ISBN	9781457707070
ISSN	19308876
e-ISBN	9781457707087
e-ISBN	9781457707063
DOI	10.1109/ESSDERC.2011.6044201
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-09-12
Publisher Place	Finland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Capacitors Transient analysis Silicon Three dimensional displays SONOS devices Logic gates Temperature measurement
Content Type	Text
Resource Type	Article

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