NDLI: High-k-oxide/silicon interfaces characterized by capacitance frequency spectroscopy

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2015 45th European Solid State Device Research Conference (ESSDERC)

2014 44th European Solid State Device Research Conference (ESSDERC)

2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

2010 Proceedings of the European Solid State Device Research Conference

2009 Proceedings of the European Solid State Device Research Conference

ESSDERC 2008 - 38th European Solid-State Device Research Conference

ESSDERC 2007 - 37th European Solid State Device Research Conference

Table of contents

Technical and economical trends in microelectronics

Architecture approaching the atomic scale

CMOS image sensors: State-Of-the-art and future perspectives

Model to hardware matching for nano-meter scale technologies

45nm/32nm CMOS ∼challenge and perspective∼

Joining microelectronics and microionics: Nerve cells and brain tissue on semiconductor chips

Large-area molecular junctions

The future outlook of memory devices

The Monte Carlo approach to transport modeling in deca-nanometer MOSFETs

Designing analog and RF circuits for ultra-low supply voltages

Low-voltage limitations of memory-rich nano-scale CMOS LSIs

Smart sensor design: The art of compensation and cancellation

Key directions and a roadmap for electrical design for manufacturability

Rigorous extraction of process variations for 65nm CMOS design

The scalability of 8T-SRAM cells under the influence of intrinsic parameter fluctuations

Analog circuits for sensors

Integrated sensor for light source position measurement applicable in SOI technology

Single-grain Si thin-film transistors for analog and RF circuit applications

Efficiency of low-power design techniques in multi-gate FET CMOS circuits

Impact of well edge proximity effect on timing

Impact of stress on various circuit characteristics in 65nm PDSOI technology

Analog design challenges and trade-offs using emerging materials and devices

Negative bias temperature instability: Recoverable versus permanent degradation

A reliable and accurate approach to assess NBTI behavior of state-of-the-art pMOSFETs with fast-WLR

Analysis of transient charging components in NBTI degradation studied for TaN gated HfO dielectrics

Power-cycling of DMOS-switches triggers thermo-mechanical failure mechanisms

Multi-gate devices for the 32nm technology node and beyond

Impact of the gate stack on the electrical performances of 3D multi-channel MOSFET (MCFET) on SOI

Strain enhancement in spacerless N-channel FinFETs with silicon-carbon source and drain stressors

Electro-thermal model of a high-voltage IGBT module for realistic simulation of power converters

Characterization and modeling of CMOS on-chip coupled interconnects

Modeling of passive-active device interactions

Numerical and analytical simulations of suspended gate - FET for ultra-low power inverters

Thermal resistance reduction in power MOSFETs integrated in a 65nm SOI technology

Design and characterization of STI compatible high-voltage NMOS and PMOS devices in standard CMOS process

Lateral HV-MOS transistors (50V) for integration in a 0.18μm CMOS-process

Microscopic modeling of high frequency noise in SiGe HBTs

Random telegraph signal noise SPICE modeling for circuit simulators

Trading off static power and dynamic performance in CMOS digital circuits: bulk versus double gate SOI MOSFETs

Achieving low V Ni-FUSI CMOS via lanthanide incorporation in the gate stack

Effective control of flat-band voltage in HfO gate dielectric with La incorporation

Demonstration of phase-controlled Ni-FUSI CMOSFETs employing SiON dielectrics capped with sub-monolayer ALD HfSiON for low power applications

Dual work function high-k/Metal Gate CMOS FinFETs

Band edge NMOS work function for nickel fully-silicided (FUSI) gate obtained by the insertion of novel Y-, Tb-, and Yb-based interlayers

Status and challenges of PCM modeling

Self-aligned μTrench phase-change memory cell architecture for 90nm technology and beyond

The conductive bridging random access memory (CBRAM): A non-volatile multi-level memory technology

W/Ta/TaN MIM capacitor for high density one time programmable memory

Critique of high-frequency performance of carbon nanotube FETs

The role of inelastic electron-phonon interaction on the on-current and gate delay time of CNT FETs

A novel graphene channel field effect transistor with Schottky tunneling source and drain

Phonon-scattering effects in CNT- FETs with different dimensions and dielectric materials

A new fabrication method for multi-layer stacked devices using wafer-to-wafer stacked technology based on 8-inch wafers

Fully-depleted SOI CMOS technology using WN metal gate and HfSi high-k dielectric

Low resistive tungsten dual polymetal gate process for high speed and high density memory devices

Embedded FLASH memory thermal budget impact on core CMOS 90nm devices

Characterization of the pile-up of As at the SiO/Si interface

Mobility issues in double-gate SOI MOSFETs: Characterization and analysis

Reliable extraction of metal gate work function by combining two electrical characterization methods

A modified constant field charge pumping method for sensitive profiling of near-junction charges

High-k-oxide/silicon interfaces characterized by capacitance frequency spectroscopy

Abrupt current switching due to impact ionization effects in Ω-MOSFET on low doped bulk silicon

Analytical and compact modelling of the I-MOS (impact ionization MOS)

A complementary-I-MOS technology featuring SiGe channel and i-region for enhancement of impact-ionization, breakdown voltage, and performance

Threshold voltage in tunnel FETs: physical definition, extraction, scaling and impact on IC design

Gate-all-around Si-nanowire CMOS inverter logic fabricated using top-down approach

Current transport mechanisms of Schottky barrier and modified Schottky barrier MOSFETs

Uniaxial strained silicon n-FETs on silicon-germanium-on-insulator substrates with an e-Si stress transfer layer and source/drain stressors for performance enhancement

Fabrication, characterization and modeling of strained SOI MOSFETs with very large effective mobility

Leakage current reduction in 80 nm biaxially strained Si nMOSFETs on in-situ doped SiGe virtual substrates

Advantages of bulk over SOI in performance of thyristor-based SRAM cell with selective epitaxy anode

Lateral-Extended (LatEx.) active for improvement of data retention time for sub 60nm DRAM era

1T-capacitorless bulk memory: Scalability and signal impact

From point defects to dislocation loops: A comprehensive TCAD model for self-interstitial defects in silicon

Atomistic modeling and physical comprehension of the effects of implant dose rate on boron activation in pMOSFET S/D

On a computationally efficient approach to boron-interstitial clustering

An experimental and simulation study of pnp Si/SiGeC HBTs using box-like Ge profiles

A novel base current phenomenon in SiGe HBTs operating in inverse mode

Characterization of PVD aluminum nitride for heat spreading in RF IC's

Intermediate frequency lamb wave coupled resonator filters for RF receiver architectures

Low-Noise CMOS single-photon avalanche diodes with 32 ns dead time

Transient charge pumping as a new technique for a higher sensitivity SOI MOSFET photodetector

Degradation of spectral response and dark current of CMOS image sensors in deep-submicron technology due to γ-irradiation

Fabrication of a bolometric infrared micro-spectrometer

Anisotropy of electron mobility in arbitrarily oriented FinFETs

Monte Carlo study of apparent mobility reduction in nano-MOSFETs

Effects of shear strain on the conduction band in silicon: An efficient two-band k·p theory

Modeling of hole inversion layer mobility in unstrained and uniaxially strained Si on arbitrarily oriented substrates

Design improvement of RF 3D MIM damascene capacitor

New capacitor parametric test methodology for process issues control

Accelerated lifetime measurements on thin film ferroelectric materials with a high dielectric constant

Characterization and modeling of long term retention in SONOS non volatile memories

Integration of CVD silicon nanocrystals in a 32Mb NOR flash memory

Low voltage hot-carrier programming of ultra-scaled SOI finflash memories

The $ESBT^{®}$ (Emitter-Switched Bipolar Transistor): a new monolithic power actuator technology devoted to high voltage and high frequency applications

Theoretical analysis of $XtreMOS^{™}$ power transistors

Impact of lateral non-uniform doping and hot carrier degradation on capacitance behavior of high voltage MOSFETs

Fragmented membrane MEM bulk lateral resonators with nano-gaps on 1.5μm SOI

Electrothermal tuning and SNR of nanoelectromechanical resonators

New compact MEMS-switch controlled tunable DGS coplanar bandpass filter

A High-Sensitive Pd/InGaP transistor hydrogen sensor

Anodic Ta2O5 for CMOS compatible low voltage electrowetting-on-dielectric device fabrication

Germanium-On-Nothing (GeON): an innovative technology for ultrathin Ge film integration

Analysis of junction leakage in advanced germanium P+/n junctions

0.12μm P-MOSFETs with High-K and Metal Gate Fabricated in a Si Process Line on 200mm GeOI Wafers

High Performance High-k/Metal Gate Ge pMOSFETs with gate lengths down to 125 nm and halo implant

Sub-micron, metal gate, high-к dielectric, implant-free, enhancement-mode III-V mosfets

ESSDERC author index

2006 European Solid-State Device Research Conference

Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005.

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)

ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003.

32nd European Solid-State Device Research Conference

31st European Solid-State Device Research Conference

30th European Solid-State Device Research Conference

29th European Solid-State Device Research Conference

28th European Solid-State Device Research Conference

27th European Solid-State Device Research Conference

ESSDERC '96: Proceedings of the 26th European Solid State Device Research Conference

ESSDERC '95: Proceedings of the 25th European Solid State Device Research Conference

ESSDERC '94: 24th European Solid State Device Research Conference

ESSDERC '93: 23rd European solid State Device Research Conference

ESSDERC '92: 22nd European Solid State Device Research conference

ESSDERC '91: 21st European Solid State Device Research Conference

ESSDERC '90: 20th European Solid State Device Research Conference

ESSDERC '89: 19th European Solid State Device Research Conference

ESSDERC '88: 18th European Solid State Device Research Conference

ESSDERC '87: 17th European Solid State Device Research Conference

High-k-oxide/silicon interfaces characterized by capacitance frequency spectroscopy

Content Provider	IEEE Xplore Digital Library
Author	Raeissi, B. Piscator, J. Engstrom, O. Hall, S. Buiu, O. Lemme, M.C. Gottlob, H.D.B. Hurley, P.K. Cherkaoui, K. Osten, H.J.
Copyright Year	2007
Description	Author affiliation: Chalmers Univ. of Technol., Goteborg (Raeissi, B.; Piscator, J.; Engstrom, O.)
Abstract	Electron capture into insulator/silicon interface states is investigated for high-k dielectrics of $Gd_{2}O_{3}$ prepared by MBE and ALD, and for $HfO_{2}$ prepared by reactive sputtering, by measuring the frequency dependence of MOS capacitance. The capture cross sections are found to be thermally activated and to increase steeply with the energy depth of the interface electron states. The methodology adopted is considered useful for increasing the understanding of high-k-oxide/silicon interfaces.
Starting Page	283
Ending Page	286
File Size	326077
Page Count	4
File Format	PDF
ISBN	9781424411238
ISSN	19308876
e-ISBN	9781424411245
DOI	10.1109/ESSDERC.2007.4430933
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-09-11
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon Capacitance Frequency Spectroscopy Radioactive decay Dielectrics and electrical insulation Interface states High-K gate dielectrics Hafnium oxide Sputtering
Content Type	Text
Resource Type	Article

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