NDLI: Projected bandwidth loop - an alternative to adaptive bandwidth loops with reduced complexity

Content Provider	IEEE Xplore Digital Library
Author	Khan, F.A. Dempster, A.G. Rizos, C.
Copyright Year	2010
Description	Author affiliation: School of Surveying & Spatial Information Systems, University of New South Wales, Australia (Khan, F.A.; Dempster, A.G.; Rizos, C.)
Abstract	For a carrier phase positioning receiver, phase lock loop (PLL) performance is of critical importance due to the fact that the carrier phase measurements, used for determining the final positioning solution, originate from the PLL. The performance of the PLL dictates the quality of these measurements and eventually, that of the positioning solution. Total phase jitter has been identified as the metric of a PLL's performance and needs to be reduced to improve the quality of these measurements. Use of an adaptive bandwidth (B) architecture is a widely accepted approach to reduce this jitter, but is associated with increased processing complexity. This paper proposes the novel concept of the Projected Bandwidth (B) architecture which offers similar advantages but with reduced complexity. However, this is achieved at the cost of slight degradations in jitter reductions compared to a B architecture. It is shown using theoretical analysis that the use of a B architecture does not degrade the improvements by more than 3.7% of those offered by a B architecture. It is also shown that for Carrier-to-Noise- and Interference-Ratio (CNIR) more than 40dB-Hz, the B architecture offers the same amount of jitter reduction as a B architecture. This paper also discusses implementation issues and presents simulation results. It is shown that by using B, total phase jitter reduction of more than 25% can be achieved.
Starting Page	1147
Ending Page	1153
File Size	498547
Page Count	7
File Format	PDF
ISBN	9781424450367
ISSN	21533598
DOI	10.1109/PLANS.2010.5507233
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-05-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Bandwidth Tracking loops Jitter Interference Phase locked loops Position measurement Degradation Phase measurement Costs Noise measurement interference mitigation Projected Bandwidth Adaptive Bandwidth Tracking Loops PLL
Content Type	Text
Resource Type	Article

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