NDLI: The Road to COTS-Interoperability: From Generic HLA-Interfaces Towards Plug-and-Play Capabilities

Content Provider	IEEE Xplore Digital Library
Author	Strassburger, S.
Copyright Year	2006
Description	Author affiliation: Factory Oper. & Autom. IFF, Fraunhofer Inst., Magdeburg (Strassburger, S.)
Abstract	Interoperability between commercial-off-the-shelf (COTS) simulation packages (CSPs) is a topic which has been discussed for many years without a solution. With the advent of the high level architecture for modeling and simulation (HLA) for the first time a real industry standard has been made available which promises interoperability for a wide range of simulation systems and applications. Successful attempts to integrate HLA interfaces into different simulation packages have been made in the past. However, these interfaces typically place a significant overhead on the simulation developer. Also, as often a generic HLA interface is provided, different HLA interfaces for different simulation packages are not necessarily interoperable per se, as there are different possible ways to use HLA for the same task. This article addresses these issues and discusses interoperability solutions based on and beyond of HLA. It further investigates and comments the interoperability reference solutions put forward by SISO's COTS simulation package interoperability product development group
Starting Page	1111
Ending Page	1118
File Size	219785
Page Count	8
File Format	PDF
ISBN	1424405009
DOI	10.1109/WSC.2006.323201
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-12-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Product development Standardization Protocols Production facilities Manufacturing automation Chip scale packaging Java
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

The road to COTS-interoperability: from generic HLA-interfaces towards plug-and-play capabilities

Developing Interoperability Standards for Distributed Simulaton and Cots Simulation Packages with the CSPI PDG

Mechanized assembly of multichip modules

Experience gained manufacturing HDI PWBs

Automation versus education (chip design process)

Simulation of Complex Manufacturing Systems via HLA-Based Infrastructure

Standardization trends for communication interfaces and protocols

Network configuration technique for home appliances

Cost analysis of chip scale packaging

The Road to COTS-Interoperability: From Generic HLA-Interfaces Towards Plug-and-Play Capabilities

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The road to COTS-interoperability: from generic HLA-interfaces towards plug-and-play capabilities

Developing Interoperability Standards for Distributed Simulaton and Cots Simulation Packages with the CSPI PDG

Mechanized assembly of multichip modules

Experience gained manufacturing HDI PWBs

Automation versus education (chip design process)

Simulation of Complex Manufacturing Systems via HLA-Based Infrastructure

Standardization trends for communication interfaces and protocols

Network configuration technique for home appliances

Cost analysis of chip scale packaging

The Road to COTS-Interoperability: From Generic HLA-Interfaces Towards Plug-and-Play Capabilities