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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jaberipur, G. Parhami, B. Ghodsi, M. |
| Copyright Year | 2001 |
| Description | Author affiliation: Shahid Beheshti Univ, Tehran, Iran (Jaberipur, G.) |
| Abstract | Redundant representations play an important role in highspeed computer arithmetic. One key reason is that such representations support carry free addition; i.e., addition in a small, constant time, independent of operand widths. We explore the implications of stored-transfer or transfer-save representation of digit sets for redundant number systems on the speed and cost of arithmetic algorithms and show that our methods lead to some of the fastest, most efficient implementations of carry free arithmetic reported thus far. The speed/efficiency arises from storing or saving, instead of combining through addition, the transfer values generated during carry free arithmetic. |
| Starting Page | 1304 |
| Ending Page | 1308 |
| File Size | 553149 |
| Page Count | 5 |
| File Format | |
| ISBN | 078037147X |
| ISSN | 10586393 |
| DOI | 10.1109/ACSSC.2001.987701 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2001-11-04 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Redundancy Hardware Digital arithmetic Costs Digital systems Fuses Encoding |
| Content Type | Text |
| Resource Type | Article |
| Subject | Signal Processing Computer Networks and Communications |
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