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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Muller, M. Kopecek, R. Fath, P. Zahedi, C. Peter, K. |
| Copyright Year | 2003 |
| Description | Author affiliation: Dept. of Phys., Konstanz Univ., Germany (Muller, M.; Kopecek, R.; Fath, P.) |
| Abstract | Liquid phase epitaxy (LPE) was used to deposit thin crystalline layers on multicrystalline silicon wafers fabricated from upgraded metallurgical silicon feedstock provided by Elkem. In previous investigations we reported on LPE technologies capable to grow on up to 6 layers (12 cm/sup 2/) in a batch type apparatus. In this paper we present an up-scaling of our LPE system to a total deposition area of 0,54 m/sup 2/ per run. We report on the investigation of different barrier layers (SiO/sub x/, TaO, TaN) deposited on one side of the wafer to avoid epi-growth on the rear. In addition three different crucible materials (quartz, graphite and sigradur/spl reg/) and different wafer carriers were tested. Explanations for an unintentionally grown oxide on the wafer surface are suggested. |
| Starting Page | 1221 |
| Ending Page | 1224 |
| File Size | 491690 |
| Page Count | 4 |
| File Format | |
| ISBN | 4990181603 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2003-05-11 |
| Publisher Place | Japan |
| Access Restriction | Subscribed |
| Rights Holder | PVSEC Advisory Committee |
| Subject Keyword | Silicon Large-scale systems Production Substrates Photovoltaic cells Electronics industry Temperature Epitaxial growth Crystallization Costs |
| Content Type | Text |
| Resource Type | Article |
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