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Content Provider | IEEE Xplore Digital Library |
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Author | Haroun, I. Yuan-Chia Hsu Wight, J. Plett, C. |
Copyright Year | 2009 |
Description | Author affiliation: Chip Implementation Center, Hsinchu, Taiwan (Yuan-Chia Hsu) || Carleton University, Ottawa, Canada (Haroun, I.; Wight, J.; Plett, C.) |
Abstract | A 90-nm CMOS single-stage low-noise amplifier with vertical planar waveguide (VPW) matching elements for use in millimeter-wave (mmW) transceivers has been developed and tested. The experimental results showed a noise figure of less than 4.1 dB and a gain higher than 10 dB in a frequency range of 57–58 GHz, and an input third-order intercept (IIP3) point greater than 3 dBm. The measured power consumption is 15.2 mW from a 1.5V supply. The proposed design is well suited for multi-gigabit mmW wireless systems. |
Starting Page | 473 |
Ending Page | 476 |
File Size | 723545 |
Page Count | 4 |
File Format | |
ISBN | 9781424428014 |
DOI | 10.1109/APMC.2009.5384203 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2009-12-07 |
Publisher Place | Singapore |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Low-noise amplifiers Planar waveguides Millimeter wave measurements Transceivers Testing Noise figure Gain Frequency Power measurement Energy consumption |
Content Type | Text |
Resource Type | Article |
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