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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Spear, M.F. Silverman, M. Dalessandro, L. Michael, M.M. Scott, M.L. |
| Copyright Year | 2008 |
| Description | Author affiliation: Dept. of Comput. Sci., Univ. of Rochester, Rochester, NY (Spear, M.F.; Silverman, M.; Dalessandro, L.) |
| Abstract | Transactional Memory (TM) takes responsibility for concurrent, atomic execution of labeled regions of code, freeing the programmer from the need to manage locks. Typical implementations rely on speculation and rollback, but this creates problems for irreversible operations like interactive I/O. A widely assumed solution allows a transaction to operate in an inevitable mode that excludes all other transactions and is guaranteed to complete, but this approach does not scale. This paper explores a richer set of alternatives for software TM, and demonstrates that it is possible for an inevitable transaction to run in parallel with (non-conflicting) non-inevitable transactions, without introducing significant overhead in the non-inevitable case. We report experience with these alternatives in a graphical game application. We also consider the use of inevitability to accelerate certain common-case transactions. |
| Starting Page | 59 |
| Ending Page | 66 |
| File Size | 308866 |
| Page Count | 8 |
| File Format | |
| ISBN | 9780769533742 |
| ISSN | 01903918 |
| DOI | 10.1109/ICPP.2008.55 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-09-09 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Concurrent computing Instruments Writing Scalability Software Runtime Permission System Calls Software Transactional Memory Inevitability I/O |
| Content Type | Text |
| Resource Type | Article |
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