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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Win-Ming Chang Hui-I Wu Jou, C.F. |
| Copyright Year | 2007 |
| Description | Author affiliation: Dept. of Commun. Eng., Nat. Chiao Tung Univ., Hsinchu (Win-Ming Chang; Hui-I Wu; Jou, C.F.) |
| Abstract | A new prototype of sub-harmonic mixer using switched Gm technique is designed and implemented in a standard 0.18 um CMOS technology. By using the PMOS active load and a switched Gm prototype at LO port, the new sub-harmonic mixer can achieve high conversion power gain and still maintain high linearity, and we can alleviate the shortage of the voltage headroom at IF output. In addition, it consumes no DC power while there is no LO input. At 5.2-GHz ISM band, this fully integrated sub-harmonic mixer achieves measured high conversion power gain of 12.8 dB, -1.8 dBm input third order intercept point (IIP3), and 14.0 dB noise figure at 10-MHz with 4 dBm LO power. |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 3859217 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424407484 |
| DOI | 10.1109/APMC.2007.4555046 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-12-11 |
| Publisher Place | Thailand |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Dual band Communication switching Noise figure CMOS process Prototypes CMOS technology Voltage Noise measurement Microwave theory and techniques Microwave communication dual-band Switched transconductor mixer Gilbert mixer CMOS sub-harmonic mixer |
| Content Type | Text |
| Resource Type | Article |
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