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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Bhattacharyya, A. |
| Copyright Year | 2013 |
| Description | Author affiliation: Dept. of Comput. Sci., Univ. of Alberta, Edmonton, AB, Canada (Bhattacharyya, A.) |
| Abstract | Figure 1 shows the performance of three parallel versions (auto-SIMDized, auto-SIMDized+auto-OpenMP by bgxlc r and auto-SIMDized+auto-OpenMP+speculatively parallelized by an automatic speculative parallelization framework developed) of the SPEC2006 and PolyBench/C benchmarks. The speculative loops in lbm have 98% coverage that accounts for the speedup while in bzip2(35%) and dynprog (26%), the poor coverage of speculative loops introduces overhead. h264ref has the highest number of loops speculatively parallelized (47) but most of them have function calls that introduce dependences, thus causing slowdown (only 12% of speculative threads successfully committed). Filtering speculative execution of loops with non-side-effect-free function calls tackles the mispeculation overhead. cholesky and dynprog experience L1 cache misses due to LR mode(12% and 10% respectively) while jacobi and seidel experience huge dynamic path length increase (112% and 123% respectively over sequential). |
| Starting Page | 401 |
| Ending Page | 401 |
| File Size | 47184 |
| Page Count | 1 |
| File Format | |
| ISBN | 9781479910182 |
| ISSN | 1089795X |
| e-ISBN | 9781479910212 |
| DOI | 10.1109/PACT.2013.6618836 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-09-07 |
| Publisher Place | UK |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Benchmark testing Runtime Educational institutions Electronic mail Hardware Software |
| Content Type | Text |
| Resource Type | Article |
| Subject | Theoretical Computer Science Hardware and Architecture Software |
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