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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Minjang Kim Lakshminarayana, N.B. Hyesoon Kim Chi-Keung Luk |
| Copyright Year | 1968 |
| Abstract | As multicore processors are deployed in mainstream computing, the need for software tools to help parallelize programs is increasing dramatically. Data-dependence profiling is an important program analysis technique to exploit parallelism in serial programs. More specifically, manual, semiautomatic, or automatic parallelization can use the outcomes of data-dependence profiling to guide where and how to parallelize in a program. However, state-of-the-art data-dependence profiling techniques consume extremely huge resources as they suffer from two major issues when profiling large and long-running applications: 1) runtime overhead and 2) memory overhead. Existing data-dependence profilers are either unable to profile large-scale applications with a typical resource budget or only report very limited information. In this paper, we propose an efficient approach to data-dependence profiling that can address both runtime and memory overhead in a single framework. Our technique, called SD3, reduces the runtime overhead by parallelizing the dependence profiling step itself. To reduce the memory overhead, we compress memory accesses that exhibit stride patterns and compute data dependences directly in a compressed format. We demonstrate that SD3 reduces the runtime overhead when profiling SPEC 2006 by a factor of 4.1× and 9.7× on eight cores and 32 cores, respectively. For the memory overhead, we successfully profile 22 SPEC 2006 benchmarks with the reference input, while the previous approaches fail even with the train input. In some cases, we observe more than a 20× improvement in memory consumption and a 16× speedup in profiling time when 32 cores are used. We also demonstrate the usefulness of SD3 by showing manual parallelization followed by data dependence profiling results. |
| Sponsorship | IEEE Computer Society Technical Committee on Distributed Process IEEE Computer Society Technical Committee on VLSI IEEE Technical Committee on Computer Architecture IEEE Computer Society |
| Starting Page | 2516 |
| Ending Page | 2530 |
| Page Count | 15 |
| File Size | 2578444 |
| File Format | |
| ISSN | 00189340 |
| Volume Number | 62 |
| Issue Number | 12 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-01-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Runtime Memory management Heuristic algorithms Pararell processing Resource management Benchmark testing parallelization Profiling data dependence parallel programming program analysis compression |
| Content Type | Text |
| Resource Type | Article |
| Subject | Theoretical Computer Science Computational Theory and Mathematics Software Hardware and Architecture |
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