NDLI: Methodology to design reconfigurable architecture for acoustic algorithms

Content Provider	IEEE Xplore Digital Library
Author	Chun Hok Ho Yiu, C.K.F.
Copyright Year	2009
Description	Author affiliation: Department of Computing, Imperial College London, SW7 2BZ, United Kingdom (Chun Hok Ho) \|\| Department of Applied Mathematics, The Hong Kong Polytechnic University, Kowloon, China (Yiu, C.K.F.)
Abstract	This paper proposes a novel approach to implement reconfigurable architecture dedicated to acoustic algorithms. To explore different reconfigurable architecture suitable for acoustic algorithms, a methodology called virtual embedded block has been applied to identify suitable building blocks which can be a good candidate to embed into existing reconfigurable devices to increase the performance of the devices when acoustic computations are involved. Two acoustic algorithms, namely echo cancellation and beamforming, have been studied to demonstrate how this methodology appiles to real life scenario. This methodology offers a rapid way to estimate how the embedded blocks in reconfigurable devices affect the performance of acoustic algorithms.
Starting Page	34
Ending Page	35
File Size	194355
Page Count	2
File Format	PDF
ISBN	9781424429752
DOI	10.1109/ISCE.2009.5157035
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-05-25
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Design methodology Algorithm design and analysis Reconfigurable architectures Radio frequency Consumer electronics Neural networks Next generation networking Liquefied natural gas US Department of Transportation
Content Type	Text
Resource Type	Article

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