NDLI: Impulse C vs. VHDL for Accelerating Tomographic Reconstruction

Content Provider	IEEE Xplore Digital Library
Author	Xu, J. Subramanian, N. Alessio, A. Hauck, S.
Copyright Year	2010
Abstract	While traditional methods of designing FPGA applications have relied on schematics or HDL, much interest has been shown in C-to-FPGA tool flows that allow users to design FPGA hardware in C. We evaluate a C-to-FPGA tool flow (Impulse C) by analyzing the performance of three independent implementations of the Computed tomography (CT) filtered backprojection (FBP) algorithm developed using C, Impulse C, and VHDL respectively. In the process, we compare the design process of Impulse C versus HDL, and discuss the benefits and challenges of using Impulse C. In addition, we explore the benefits of tightly-coupled FPGA acceleration offered by the XtremeData XD1000. The results of this paper demonstrate that Impulse C designs can achieve over 61x improvement over multi-threaded software (8 threads), and close to the same performance as VHDL, while significantly reducing the design effort, and that tightly-coupled FPGA coprocessors like the XD1000 effectively overcomes the traditional communication bottleneck between CPU and FPGA.
Starting Page	171
Ending Page	174
File Size	222949
Page Count	4
File Format	PDF
ISBN	9780769540566
e-ISBN	9781424471430
DOI	10.1109/FCCM.2010.33
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-05-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Acceleration Field programmable gate arrays Algorithm design and analysis Hardware design languages Design methodology Performance analysis Process design Software performance Tomographic Reconstruction Impulse C FPGA CT Scan
Content Type	Text
Resource Type	Article

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