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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Carvajal, G. Fischmeister, S. |
| Copyright Year | 2010 |
| Abstract | A real-time communication medium must provide a special coordination mechanism to guarantee bounded communication delays. Implementing this mechanism in software offers flexibility but reduces reliability and performance. On the other hand, customized hardware solutions deliver high throughput and predictability, but they increase the implementation cost and are unable to adapt to the specific needs of individual applications. In this work, we introduce a switch that implements a programmable dedicated time-triggered packet switching mechanism on top of Ethernet. The switch, called the Network Code Switch bases on the NetFPGA system and executes flexible but verifiable state-based schedules encoded in the Network Code programming language. This permits the user to tailor the communication behavior to the needs of the distributed application with verifiable performance. We discuss our experience starting at the designing to the implementation of the prototype, and describe how we exploited modularity and code reutilization to reduce the implementation costs and increase the flexibility of the architecture. We also validate our design by evaluating the overhead and throughput of the implemented prototype. |
| Starting Page | 119 |
| Ending Page | 126 |
| File Size | 275629 |
| Page Count | 8 |
| File Format | |
| ISBN | 9780769540566 |
| e-ISBN | 9781424471430 |
| DOI | 10.1109/FCCM.2010.27 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-05-02 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Switches Time division multiple access Ethernet networks Communication switching Throughput Costs Packet switching Prototypes Delay Software performance TDMA Real-time communication Ethernet switch NetFPGA modular design |
| Content Type | Text |
| Resource Type | Article |
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