NDLI: A 60 GHz integrated sub-harmonic receiver MMIC

Content Provider	IEEE Xplore Digital Library
Author	Zelley, C.A. Barnes, A.R. Bannister, D.C. Ashcroft, R.W.
Copyright Year	2000
Description	Author affiliation: DERA, Malvern, UK (Zelley, C.A.)
Abstract	We present a 60 GHz integrated sub-harmonic receiver fabricated using the TRW 0.15 /spl mu/m gate length GaAs pHEMT foundry process. The receiver MMIC consists of a four stage LNA, a sub-harmonic diode mixer and a single stage LO buffer amplifier. The chip size is 5.8 mm/spl times/2.2 mm. The receiver MMIC has been integrated into a coaxial package for system evaluation. The packaged receiver module has a measured conversion gain of /spl ges/8 dB across the 58 GHz to 67 GHz frequency band and a typical noise figure of 5.8 dB. The use of a sub-harmonic mixer allows LO operation over the 21 to 27 GHz frequency range at a low LO drive level of -5 dBm and eliminates the need for high cost mm-wave sources. This is believed to be the first single chip V-band receiver manufactured using a commercially available, high yield, production foundry process. This paper describes the design, packaging and measured performance of the integrated sub-harmonic receiver MMIC.
Starting Page	175
Ending Page	178
File Size	372740
Page Count	4
File Format	PDF
ISBN	0780359682
ISSN	10647775
DOI	10.1109/GAAS.2000.906317
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-11-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Semiconductor device measurement Gallium arsenide PHEMTs MMICs Packaging Foundries Coaxial components Frequency measurement Diodes Mixers
Content Type	Text
Resource Type	Article

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