NDLI: Neural network based power estimation on chip specification

Content Provider	IEEE Xplore Digital Library
Author	Ligang Hou Xinyi Wu Wuchen Wu
Copyright Year	2010
Description	Author affiliation: VLSI &System Lab, Beijing University of Lechnology, Beijing, China (Ligang Hou; Xinyi Wu; Wuchen Wu)
Abstract	This paper forwards a neural network based VLSI power estimation on VLSI chip specification. This paper used neural network to perform VLSI power estimation. Experiments were made on chip specification parameters extracted from the datasheet of TI series micro-controllers. Different net structure, training plans and vector organizations were applied. Based on limited number of test vector, experimental results showed the neural network based power estimation could give acceptable results on chip power with specific net structure. This method can achieve a much faster power estimation result on datasheet of the same kind of VLSI chips without simulation and analysis or simulations of detail structure and interconnections. Higher training/testing ratio leads to a more accurate power estimation value.
Starting Page	187
Ending Page	190
File Size	108777
Page Count	4
File Format	PDF
ISBN	9781424473847
e-ISBN	9781424473861
DOI	10.1109/ICICIS.2010.5534739
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-06-23
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy consumption Circuit simulation Very large scale integration Chip specification Neural network Data mining Least squares approximation Circuit testing Analytical models Neural networks Network-on-a-chip Power estimation Power dissipation
Content Type	Text
Resource Type	Article

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