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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Sendi, M.S.E. Khorami, A. Sharifkhani, M. Sodagar, A.M. |
| Copyright Year | 2015 |
| Description | Author affiliation: ECE Dept., Sharif Univ. of Technol., Tehran, Iran (Sendi, M.S.E.; Khorami, A.; Sharifkhani, M.) || ECE Dept., K. N. Toosi Univ. of Technol., Tehran, Iran (Sodagar, A.M.) |
| Abstract | A general structure for capacitive digital to analog converters (CDACs) is presented in which non-binary, base-m capacitor sizing is introduced. Base-m sizing opens new trade-offs in area and INL/DNL efficiency. A base-4 (i.e., quaternary-weighted) DAC (QWDAC) is designed as an example of the proposed structure. This converter is designed and simulated after being laid out in a 0.18-μm CMOS technology at 1.8V power supply. In a typical 6-bit DAC using base-4 technique, the area reduces by a factor of three as compared to the conventional binary weighted DAC. Several Monte-Carlo simulations suggest that capacitor mismatch effect of the base-m structure is reduced owing to the smaller number of separate capacitors involved in the generation of a desired code. Moreover, the general base-m structure can be generalized to two-stage CDAC and C-2C architectures to improve the area efficiency. |
| Starting Page | 1183 |
| Ending Page | 1186 |
| File Size | 733562 |
| Page Count | 4 |
| File Format | |
| e-ISBN | 9781479919727 |
| DOI | 10.1109/IranianCEE.2015.7146394 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-05-10 |
| Publisher Place | Iran |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Electrical engineering Out of order Frequency modulation Conferences Parasitic capacitance effect Base-m DAC DAC CDAC |
| Content Type | Text |
| Resource Type | Article |
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