NDLI: A novel audio playback chip using digitally driven speaker architecture with 80%@-10dBFS power efficiency, 5.5W@3.3V supply and 100dB SNR

Content Provider	IEEE Xplore Digital Library
Author	Yoshino, M. Iwaide, M. Kuniyoshi, D. Ohtani, H. Yasuda, A. Okamura, J.
Copyright Year	2011
Description	Author affiliation: Trigence Semiconductor, Tokyo Japan (Okamura, J.) \|\| Hosei University, Tokyo Japan (Yoshino, M.; Iwaide, M.; Kuniyoshi, D.; Ohtani, H.; Yasuda, A.)
Abstract	A novel audio playback chip using digitally driven speaker architecture based on a delta-sigma modulator and newly proposed high-order mismatch shaper with novel dither circuit is presented. It can realize 5.5W output power into 4Ω speakers with only 3.3V power supply. The power efficiency from -10dBFS to 0dBFS is higher than 80%. The efficiency at low power output can realize long battery life. This chip can realize battery powered high-fidelity and high-power audio system.
Starting Page	1
Ending Page	4
File Size	522395
Page Count	4
File Format	PDF
ISBN	9781457702228
ISSN	08865930
e-ISBN	9781457702235
DOI	10.1109/CICC.2011.6055385
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-09-19
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Loudspeakers Power amplifiers Power generation Noise CMOS integrated circuits Coils Matched filters
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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A novel audio playback chip using digitally driven speaker architecture with 80%@-10dBFS power efficiency, 5.5W@3.3V supply and 100dB SNR