NDLI: An 18µW 79dB-DR 20KHz-BW MASH ΔΣ modulator utilizing self-biased amplifiers for biomedical applications

Content Provider	IEEE Xplore Digital Library
Author	Le Wang Theogarajan, L.
Copyright Year	2011
Description	Author affiliation: Department of Electrical and Computer Engineering, University of California Santa Barbara, USA (Le Wang; Theogarajan, L.)
Abstract	This paper presents a micro power, area-efficient $4^{th}-order$ MASH delta-sigma modulator based on a novel self-biased amplifiers for neural sensing applications. A high-gain self-biased CMOS amplifier is proposed to achieve low power operation. Floating correlated double sampling technique is devised to enhance the amplifer's gain-linearity and hence the modulator's SFDR and SNDR performance. Fabricated in a 0.13 µm CMOS process, the prototype achieves 71 dB peak SNDR and 79 dB peak DR over 20 KHz neural signal bandwidth, while occupying only 0.06 $mm^{2}$ silicon area. By optimizing the power budgets for different amplifiers, the MASH modulator consumes only 18 µW from 1.5 V supply. The proposed circuit techniques can be applied to other operational transconductance amplifier-based circuits for low power, high speed, and area-efficient design.
Starting Page	1
Ending Page	4
File Size	505778
Page Count	4
File Format	PDF
ISBN	9781457702228
ISSN	08865930
e-ISBN	9781457702235
DOI	10.1109/CICC.2011.6055286
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-09-19
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Modulation Multi-stage noise shaping Prototypes Inverters CMOS integrated circuits Noise Mathematical model
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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